Sequence controller

Abstract

PURPOSE:To simplify the circuit of a sequence controller by permitting a central processor to execute an output instruction in response to the zero-cross timing of a commercial power source. CONSTITUTION:According to a program in program storing device 4, CPU1 performs arithmetic that corresponds to the state of an external device obtained via input device 2, and then transfers the result to the external device via output device 3. The zero-cross point of the commercial power source is detected and on the basis of the detection signal, an interruption signal is generated by interruption generator 7 to permit CPU to make an interruption. In response to the interruption signal, CPU1 executes output instruction successively to send a pulse signal to output device 3, triggering Triacs 35-38. Thus, a latch circuit, etc., for the temporary storage of the state of the external device is unnecessary and the circuit can be simplified.

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Patent Citations (1)

    Publication numberPublication dateAssigneeTitle
    JP-S53122079-AOctober 25, 1978Sharp CorpOutput controlling system for sequential controller

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