Semiconductor device

半導体装置

Abstract

(57)【要約】 【目的】 LDD構造を有する半導体装置の静電気耐量 を向上させた半導体装置を提供すること。 【構成】 LDD構造のMOSトランジスタを有する半 導体装置の静電気保護用MOSトランジスタにおいて、 ドレインの拡散層全領域の濃度をソ−スの拡散層濃度よ りも高くした構造(図1のN型高濃度ドレイン5及びN 型低濃度ソ−ス9参照)の半導体装置。 【効果】 ドレイン濃度をソ−ス濃度より高くすること で、スナップバックを起き易くすると共にスナップバッ ク後の電流を抑制することができ、静電気耐量を向上さ せることができる。
PURPOSE: To provide a semiconductor device in which the current after snap- back is decreased and the resistance to static electricity is improved by using such a structure that impurity concentration is higher in the whole diffused drain region than in the diffused source region. CONSTITUTION: A transistor of an LDD structure including source 9 and drain 5 of normal impurity concentration is fabricated, and high-density ions are introduced to the drain 5 with the source 9 masked, so that the diffused drain has a higher concentration than the diffused source. In this structure, snap-back occurs easily and the impurity concentration in the diffused source is low compared with the conventional transistor. After snap-back, this transistor has a high resistance compared with the conventional transistor. Therefore, the current after snap-back is decreased and the resistance to static electricity is improved. COPYRIGHT: (C)1995,JPO

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Patent Citations (2)

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Cited By (1)

    Publication numberPublication dateAssigneeTitle
    US-6191454-B1February 20, 2001Nec CorporationProtective resistance element for a semiconductor device